The present invention is related in general to the field of semiconductor devices and processes and more specifically to the wafer-level fabrication of fine-pitch, high aspect ratio conductive pillars for solder interconnections.
In the conventional integrated circuit chip, wire-bonding is generally used to electrically connect the bonding pads of a chip to a substrate. However, flip-chip bonding and inner lead bonding gradually replaced wire-bonding for the solutions of recent integrated circuit chip development in smaller dimension, higher density and faster electrical response. It is necessary that bumps are formed on the active surface of an integrated circuit chip to bond to a substrate for flip-chip bonding and inner lead bonding applications. The bumps have various shapes to meet different requirements of manufacturing processes such as sphere, hemisphere, lump, and pillar. Normally spherical or hemispherical bumps are formed by low temperature solder paste which is heated to melt in a reflow furnace and then cooled down to form their shapes according to their surface tension. Pillars, sometimes also called “posts” (collectively referred to hereafter as just “pillars”), are relatively taller structures and are typically made of high conductivity materials other than solder, such as copper. The pillars do not change their shape at the chip-bonding temperature so that there is no solder bridging issue. The pillars are good candidates for integrated circuit chips in fine pitch bumping.
The semiconductor industry is currently using a method of incorporating a copper pillar which is created as the final step after the back end structures are built. This copper pillar is used to increase the reliability of the packaged chip because it is a taller structure that joins two entities (silicon chip and organic package, for example) which are severely mismatched in terms of their coefficients of thermal expansions (CTEs). The additional height of pillars in comparison to standard solder bump interconnects allows for a lowering of the strain for a given amount of expansion mismatch.
The pillar is ultimately joined to the final packaging substrate using solders that are typically used for solder bumps. Copper is wettable by solder, as long as the surface of the copper is not heavily oxidized or corroded. When the solder is elevated to a temperature that causes the solder to become a liquid, the liquid solder flows onto the copper surface uninhibited.
Lee et al. U.S. Pat. No. 6,818,545 and Tsai U.S. Patent Application Publication US 2005/0017376, the disclosures of which are incorporated by reference herein, disclose in general metallic pillars having solder caps.
Arbuthnot et al. U.S. Patent Application Publication US 2004/0007779, the disclosure of which is incorporated by reference herein, discloses in FIGS. 11A, 11B and 11C a metallic pillar after reflow of a solder cap. In FIGS. 11A and 11B, the solder has reflowed down the sides of the pillar. In FIG. 11C, the pillar is made of a material which is not wettable by the solder such as titanium or tantalum so that upon reflow of the solder, the solder does not wet the sides of the pillar. However, a plated nickel layer is necessary on the top of the pillar for the solder to adhere to the pillar.
Fjelstad U.S. Pat. No. 6,177,636, the disclosure of which is incorporated by reference herein, discloses metallic pillars which are plated and which may be coated with solder.
Most solders in use today in the electronics industry contain tin (Sn). With the advent of, and the increasing use of lead (Pb)-free solders, the relative amount of Sn in the solders has gone up considerably, so that 90-99% (by atomic percent) of the solder is comprised of Sn. Sn and copper have a natural affinity for each other and will readily form intermetallic compounds. These intermetallic compounds are brittle, and undesirable. These intermetallic compounds also consume “free copper” and may cause other problems related to spalling or breakage, and further movement of these intermetallics.